mitsubishi semiconductor PS22053 transfer-mold type insulated type may 2005 all external terminals are treated with lead free solder (ingredient : sn-cu) plating. type name , lot no. qr code 22 23 24 25 26 27 28 2.54 0.3 30 ? 2.54(=76.2) 79 0.5 67 0.3 8 0.3 10.16 0.3 1. vufs 2. vufb 3. vp1 4. up 5. vvfs 6. vvfb 7. vp1 8. vp 9. vwfs 10. vwfb 11. vp1 12. vpc 13. wp 14. vn1 15. vnc 16. cin 17. cfo 18. fo 19. un 20. vn 21. wn 22. p 23. u 24. v 25. w 26. nu 27. nv 28. nw 12 34 56 78 9 10 11 12 13 14 15 16 17 18 19 20 21 2- 4.5 0.2 18.5 0.5 44 0.5 20.4 0.5 42.6 0.5 34 0.5 27.4 0.5 8.2 0.5 16.1 0.3 (2.5) (2) (2) (0.3) (1.7) (0.3) heat sink side a 48.6 0.6 heat sink side detail : a PS22053 integrated power functions 1200v/10a low-loss 4 th generation igbt inverter bridge for 3 phase dc-to-ac power conversion application ac400v 0.2kw~0.75kw inverter drive for small power motor control. fig. 1 package outlines mitsubishi semiconductor PS22053 transfer-mold type insulated type integrated drive, protection and system control functions for upper-leg igbt s :drive circuit, high voltage high-speed level shifting, control supply under-voltage (uv) protection. for lower-leg igbt s : drive circuit, control supply under-voltage protection (uv), short circuit protection (sc). fault signaling : corresponding to an sc fault (lower-side igbt) or a uv fault (lower-side supply). input interface : 5v line cmos/ttl compatible (high active logic). dimensions in mm
mitsubishi semiconductor PS22053 transfer-mold type insulated type may 2005 fig. 2 internal functions block diagram (typical application example) z : znr (surge absorber) c : ac filter (ceramic capacitor 2.2~6.5nf) (protection against common-mode noise) note1: to prevent input signals oscillation, an rc coupling at each input terminal is recommended. 2: by virtue of integrating hvic inside the module, direct coupling to mcu terminals without any opto-coupler or transformer isola tion is possible. 3: fo output is open drain type. the signal line should be pulled up to the positive side of a 5v supply with an approximate 10k ? resistor. 4: the wiring between the power dc-link capacitor and the p/n1 terminals should be as short as possible to protect dip-ipm against catastrophic high surge voltage. for extra precaution, a small film type snubber capacitor (0.1~0.22 f, high voltage type) is recommended to mount closely to the p and n1 terminals. 5: fo output pulse width (t fo ) should be determined by connecting external capacitor between cfo and v nc terminals. (example : t fo =2.4ms(typ.) at c fo =22nf) 6: high voltage (1200v or more) and fast recovery type (less than 100ns) diodes should be used for the bootstrap circuit. 7: it is recommended to insert a zener diode (24v/1w) between each pair of control supply terminals to prevent surge destruction. 8: to prevent lvic from surge destruction, it is recommended to mount a fast recovery type diode between v nc and nu, nv, nw terminals. cbu cbu+ cbv cbv+ cbw cbw+ f o cfo m (note 7) dip-ipm c2 c1 (note 4) z (15v line) v d v nc c h-side igbt s l-side igbt s w v u p n 1 nw nv nu high-side input (pwm) (5v line) (note 1,2) (note 6) ac line output input signal conditioning level shifter drive circuit protection circuit (uv) input signal conditioning input signal conditioning circuit (uv) protection circuit (uv) drive circuit drive circuit level shifter level shifter protection drive circuit input signal conditioning fo logic protection circuit control supply under-voltage protection (uv) ac line input inrush current limiter circuit (5v line) (note 1, 2) fault output (5v line) (note 3, 5) low-side input (pwm) c1 : tight tolerance, temp-compensated electrolytic type c2 : 0.22~2 f r-category ceramic capacitor for noise filtering (note : the capacitance depends on the pwm control scheme used in the applied system.) (note 8) v nc cin fig. 3 external part of the dip-ipm protection circuit note1: in the recommended external protection circuit, please select the rc time constant in the range 1.5~2.0 s. 2: to prevent erroneous protection operation, the wiring of a, b, c should be as short as possible. drive circuit drive circuit protection circuit sc protection trip level i c (a) t w ( s) 2 0 short circuit protective function (sc) : sc protection is achieved by sensing the l-side dc-bus current (through the external shunt resistor) with a suitable filtering time (defined by the rc circuit). when the sensed shunt voltage exceeds the sc trip-level, all the l-side igbts are turned off and a fault signal (fo) is output. since the sc fault may be repetitive, it is recommended to stop the system and check the fault, when the fo signal is received. (note 1) (note 2) w v u v nc cin a p n1 c r shunt resistor external protection circuit dip-ipm l-side igbt s h-side igbt s nu nv nw b c collector current waveform
mitsubishi semiconductor PS22053 transfer-mold type insulated type may 2005 note 2 : t c measurement point power terminals t c heat-sink heat sink boundary control terminals t c 800 20~+100 40~+125 2500 v d = 13.5~16.5v, inverter part t j = 125 c, non-repetitive, less than 2 s (note 2) 60hz, sinusoidal, ac 1 minute, connection pins to heat-sink plate v cc(prot) t c t stg v iso v v v v ma v 20 20 0.5~v d +0.5 0.5~v d +0.5 1 0.5~v d +0.5 applied between v p1 -v pc , v n1 -v nc applied between v ufb -v ufs , v vfb -v vfs , v wfb -v wfs applied between u p , v p , w p -v pc , u n , v n , w n -v nc applied between f o -v nc sink current at f o terminal applied between cin-v nc control supply voltage control supply voltage input voltage fault output supply voltage fault output current current sensing input voltage v d v db v in v fo i fo v sc 900 1000 1200 10 20 50.0 20~+125 applied between p-nu, nv, nw applied between p-nu, nv, nw t c = 25 c t c = 25 c, less than 1ms t c = 25 c, per 1 chip (note 1) v cc v cc(surge) v ces i c i cp p c t j condition symbol parameter ratings unit supply voltage supply voltage (surge) collector-emitter voltage each igbt collector current each igbt collector current (peak) collector dissipation junction temperature v v v a a w c maximum ratings (t j = 25 c, unless otherwise noted) inverter part condition symbol parameter ratings unit control (protection) part symbol ratings unit self protection supply voltage limit (short circuit protection capability) module case operation temperature storage temperature isolation voltage v c c v rms total system note 1 : the maximum junction temperature rating of the power chips integrated within the dip-ipm is 150 c (@ t c 100 c) however, to en- sure safe operation of the dip-ipm, the average junction temperature should be limited to t j(ave) 125 c (@ t c 100 c). parameter condition
mitsubishi semiconductor PS22053 transfer-mold type insulated type may 2005 3.4 3.2 3.0 2.2 0.7 3.8 0.7 1 10 2.00 2.67 0.047 ma v t j = 25 c t j = 125 c t j = 25 c t j = 125 c v ce(sat) v ec t on t rr t c(on) t off t c(off) i ces condition symbol parameter limits inverter igbt part (per 1/6 module) inverter fwdi part (per 1/6 module) case to fin, (per 1 module) thermal grease applied r th(j-c)q r th(j-c)f r th(c-f) min. thermal resistance typ. max. unit i c = 10a, v in = 0v condition symbol parameter limits min. typ. max. 0.8 unit electrical characteristics (t j = 25 c, unless otherwise noted) inverter part collector-emitter saturation voltage fwdi forward voltage junction to case thermal resistance v d = v db = 15v v in = 5v, i c = 10a switching times v cc = 600v, v d = v db = 15v i c = 10a, t j = 125 c, v in = 0 ? 5v inductive load (upper-lower arm) collector-emitter cut-off current v ce = v ces 2.7 2.5 2.5 1.5 0.2 0.4 2.8 0.4 v s s s s s c/w c/w c/w control (protection) part note 4 : short circuit protection is functioning only at the low-arms. please select the value of the external shunt resistor such that the sc trip- level is less than 1.7 times device current rating. 5: fault signal is output when the low-arms short circuit or control supply under-voltage protective functions operate. the fault output pulse- width t fo depends on the capacitance value of c fo according to the following approximate equation : c fo = 9.3 ? 10 -6 ? t fo [f]. symbol i d v foh v fol v sc(ref) i in uv dbt uv dbr uv dt uv dr t fo v th(on) v th(off) parameter condition limits unit circuit current fault output voltage short circuit trip level supply circuit under-voltage protection fault output pulse width on threshold voltage off threshold voltage v d = v db = 15v v in = 5v total of v p1 -v pc , v n1 -v nc v ufb -v ufs , v vfb -v vfs , v wfb -v wfs v sc = 0v, f o circuit pull-up to 5v with 10k ? v sc = 1v, i fo = 1ma t j = 25 c, v d = 15v (note 4) v in = 5v trip level reset level trip level reset level c fo = 22nf (note 5) applied between u p , v p , w p -v pc , u n , v n , w n -v nc 4.9 0.43 0.7 10.0 10.5 10.3 10.8 1.6 2.0 0.8 0.48 1.5 2.4 3.0 1.4 3.70 1.30 3.50 1.30 1.10 0.53 2.0 12.0 12.5 12.5 13.0 4.2 2.0 min. typ. max. ma ma ma ma v v v ma v v v v ms v v v d = v db = 15v v in = 0v total of v p1 -v pc , v n1 -v nc v ufb -v ufs , v vfb -v vfs , v wfb -v wfs t j 125 c note 3: grease with good thermal conductivity and long-term endurance should be applied evenly with about +100 m~+200 m on the con- tacting surface of dip-ipm and heat-sink. input current contact thermal resistance (note 3)
mitsubishi semiconductor PS22053 transfer-mold type insulated type may 2005 note 6: measurement point of heat-sink flatness + + measurement location heat-sink side heat-sink side 3.25mm mounting screw : m4 condition parameter limits mounting torque weight heat-sink flatness min. mechanical characteristics and ratings typ. max. 0.98 50 unit 77 1.47 100 n m g m recommended 1.18 n m ( note 6 ) v v v v/ s s khz arms applied between p-nu, nv, nw applied between v p1 -v pc , v n1 -v nc applied between v ufb -v ufs , v vfb -v vfs , v wfb -v wfs for each input signal, t c 100 c t c 100 c, t j 125 c v cc = 600v, v d = 15v, f c = 15khz p.f = 0.8, sinusoidal pwm t j 125 c, t c 100 c (note 7) (note 8) 800 16.5 16.5 1 15 3.4 v cc v d v db ? v d , ? v db t dead f pwm i o pwin(on) pwin(off) condition symbol parameter limits min. typ. max. 350 13.5 13.5 1 3.3 1.5 unit recommended operation conditions 600 15.0 15.0 note 7 : the output r.m.s. current value depends on the actual application conditions. 8: dip-ipm might not make response to the input on signal with pulse width less than pwin (on). 9: dip-ipm might not make response or work properly if the input off signal pulse width is less than pwin (off). minimum input pulse width v nc supply voltage control supply voltage control supply voltage control supply variation arm shoot-through blocking time pwm input frequency output r.m.s. current v nc variation v 5.0 5.0 between v nc -nu, nv, nw (including surge) 350 v cc 800v, 13.5 v d 16.5v, 13.5 v db 16.5v, 20 c t c 100 c, n line wiring inductance less than 10nh (note 9) ic 10a 10 < ic 17a s 2.5 2.7
mitsubishi semiconductor PS22053 transfer-mold type insulated type may 2005 fig. 4 the dip-ipm internal circuit dip-ipm u out uv no vv no v out w out wv no cfo gnd fo w n v n u n v cc hvic3 hvic2 hvic1 lvic cfo cin cin w v u p ho in com v b v s v cc ho in com v b v s v cc ho in com v b v s v cc fo w n v n u n w p v p u p v nc v n1 v p1 v p1 v p1 v wfs v vfs v ufs v wfb v vfb v ufb nu nv nw igbt1 igbt2 igbt3 igbt4 igbt5 igbt6 di1 di2 di3 di4 di5 di6 v pc
mitsubishi semiconductor PS22053 transfer-mold type insulated type may 2005 error output fo output current ic control supply voltage v d protection circuit state control input b1 b2 b3 b4 b5 reset reset uv dt uv dr set b6 b7 protection circuit state lower-arms control input error output fo sense voltage of the shunt resistor output current ic internal igbt gate sc reference voltage cr circuit time constant delay a5 a8 a4 a3 a1 a2 sc reset set a7 a6 fig. 5 timing charts of the dip-ipm protective functions [a] short-circuit protection (lower-arms only with the external shunt resistor and cr filter) a1. normal operation : igbt on and carrying current. a2. short circuit current detection (sc trigger). a3. igbt gate hard interruption. a4. igbt turns off. a5. f o output with a fixed pulse width determined by the external capacitor c fo . a6. input = l : igbt off a7. input = h : a8. igbt off state in spite of input h . [b] under-voltage protection (lower-arm, uv d ) b1. control supply voltage rising : after the voltage level reaches uv dr , the circuits start to operate when next input is applied. b2. normal operation : igbt on and carrying current. b3. under voltage trip (uv dt ). b4. igbt off in spite of control input condition. b5. f o keeps output during the uv period, however, f o pulse is not less than the fixed width for very short uv interval. b6. under voltage reset (uv dr ). b7. normal operation : igbt on and carrying current.
mitsubishi semiconductor PS22053 transfer-mold type insulated type may 2005 mcu 10k ? u p ,v p ,w p ,u n ,v n ,w n v nc (logic) fo dip-ipm 5v line error output fo output current ic control supply voltage v db protection circuit state control input c6 c1 c2 c4 c5 c3 reset uv dbt uv dbr set reset high-level (no fault output) [c] under-voltage protection (upper-side, uv db ) c1. control supply voltage rises : after the voltage reaches uv dbr , the circuits start to operate when next input is applied. c2. normal operation : igbt on and carrying current. c3. under voltage trip (uv dbt ). c4. igbt off in spite of control input signal level, but there is no f o signal output. c5. under voltage reset (uv dbr ). c6. normal operation : igbt on and carrying current. fig. 6 mcu i/o interface circuit note : rc coupling at each input (parts shown dotted) may change depending on the pwm control scheme used in the application and the wiring impedance of the application s printed circuit board. the dip-ipm input signal section integrates a 2.5k ? (min) pull-down resistor. therefore, when using a external filtering resistor, pay attention to the turn-on threshold voltage requirement. fig. 7 wiring connection with 1 shunt resistor using low inductance chip resistor and reducing wiring length to minimize the wiring inductance. v nc nw nv nu dip-ipm shunt resistor for 3 shunt resistors connection, please refer to fig.9. please insert fast recovery type diode between v nc and nu, nv, nw terminals. please make the wiring connection of shunt resistor to gnd as short as possible.
mitsubishi semiconductor PS22053 transfer-mold type insulated type may 2005 fig. 8 an example of typical dip-ipm application circut with 1 shunt resistor ho ho dip-ipm c3 c3 c3 c2 c2 c2 c1 c1 c1 ho in in 15v line 5v line in com com com u out v out w out wv no vv no uv no cfo gnd fo w n v n v cc c b a c4(c fo ) cfo r1 n1 c5 cin cin w v u p v s v s v s v b v b v b v cc v cc v cc fo w n v n u n u n w p v p u p v nc v n1 v p1 v pc v p1 v p1 v wfs v vfs v ufs v wfb v vfb v ufb m c3 mcu hvic1 hvic2 hvic3 lvic nw nv nu if this wiring is too long, short circuit might be caused. shunt resistor if this wiring is too long, the sc level fluctuation might be larger and cause sc malfunction. the long wiring of gnd might generate noise on input and cause igbt to be malfunction. c1:tight tolerance temp-compensated electrolytic type c2,c3: 0.1 ~ 0.22 f r-category ceramic capacitor for noise filtering. (note: the capacitance value depends on the pwm control used in the applied system.) shunt resistor comparator or logic circuit + vref r p u drive circuit drive circuit protection circuit v w cin dip-ipm external protection circuit c + vref r c + vref r c h-side igbt s l-side igbt s v nc the time constant rc of external comparator should be selected in the range of 1.5~2 s. sc interrupting time might vary with the wiring pattern. the threshold voltage v ref should be set up the same rating of short circuit trip level (v sc ( ref ) typ. 0.48v). please select the external shunt resistance such that the sc trip-level is less than 1.7 times of the current rating. to avoid malfunction, the wiring of each input should be as short as possible. or circuit output level should be set up the rating of short circuit trip level (v sc ( ref ) typ. 0.48v). for extra precaution, please refer to fig.8 nw nv nu fig. 9 example of external protection circuit with 3 shunt resistors note 1 : to avoid malfunction, the wiring of each input should be as short as possible. (less than 2-3cm) 2: by virtue of integrating hvic inside the module, direct coupling to mcu terminals without any opto-coupler or transformer isola tion is possible. 3: fo output is open drain type. the signal line should be pulled up to the positive side of a 5v supply with an approximate 10k ? resistor. 4: fo output pulse width (t fo ) should be determined by connecting external capacitor c4 between cfo and v nc terminals. (example : t fo =2.4ms(typ.) at c fo =22nf) 5: input signal is high-active type. there is a 2.5k ? (min.) resistor inside ic to pull down each input signal line to gnd. when employing rc coupling circuits at each input, set up rc couple such that input signal agree with turn-off/turn-on threshol d voltage. 6: to prevent errors of the protection function, the wiring of a, b, c should be as short as possible. 7: the time constant r5c1 of the protection circuit should be selected in the range of 1.5~2 s. sc interrupting time might vary with the wiring pattern. 8: all capacitors should be mounted as close to the terminals of the dip-ipm as possible. 9: to prevent surge destruction, the wiring between the smoothing capacitor and the p&n1 terminals should be as short as possible. generally a 0.1~0.22 f snubber between the p&n1 terminals is recommended. 10: it is recommended to insert a zener diode (24v/1w) between each pair of control supply terminals to prevent surge destruction. 11: to prevent lvic from surge destruction, it is recommended to mount a fast recovery type diode between v nc and nu, nv, nw terminals.
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